Part Number Hot Search : 
SPECS ST7FLI BDX43 89534LHC 29LV0 AON7424 AD642S 14012
Product Description
Full Text Search
 

To Download IRFR110 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  ?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b IRFR110, irfu110 4.7a, 100v, 0.540 ohm, n-channel power mosfets these are n-channel enhancement mode silicon gate power ?ld effect transistors designed, tested, and guaranteed to withstand a speci?d level of energy in the breakdown avalanche mode of operation. these advanced power mosfets are designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate-drive power. these transistors can be operated directly from integrated circuits. formerly developmental type ta17441. features 4.7a, 100v ? ds(on) = 0.540 ? single pulse avalanche energy rated soa is power dissipation limited nanosecond switching speeds linear transfer characteristics high input impedance 175 o c operating temperature related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging ordering information part number package brand irfu110 to-251aa ifu110 IRFR110 to-252aa ifr110 note: when ordering, use the entire part number. g d s jedec to-251aa jedec to-252aa gate source drain drain (flange) drain (flange) gate source data sheet january 2002
?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d IRFR110, irfu110 units drain to source voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ds 100 v drain to gate voltage (note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v dgr 100 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 4.7 a t c = 100 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 3.3 a pulsed drain current (note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i dm 17 a gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gs 20 v maximum power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 30 w linear derating factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 w/ o c single pulse avalanche rating (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e as 19 mj operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 175 o c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 150 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v (figure 10) 100 - - v gate to threshold voltage v gs(th) v gs = v ds , i d = 250 a 2-4v zero gate voltage drain current i dss v ds = rated bv dss , v gs = 0v - - 25 a v ds = 0.8 x rated bv dss , v gs = 0v, t j = 150 o c - - 250 a on-state drain current i d(on) v ds > i d(on) x r ds(on)max , v gs = 10v 4.7 - - a gate to source leakage current i gss v gs = 20v - - 100 na drain to source on resistance (note 4) r ds(on) i d = 3.3a, v gs = 10v (figures 8, 9) - 0.41 0.540 ? forward transconductance (note 4) g fs v ds = 50v, i ds = 3.3a (figure 12) 1.3 2.0 - s turn-on delay time t d(on) v dd = 50v, i d 5.6a, r gs = 24 ? , r l = 9.1 ? , v gs = 10v mosfet switching times are essentially indepen- dent of operating temperature - 7.6 11 ns rise time t r -2436ns turn-off delay time t d(off) -1421ns fall time t f -1421ns total gate charge q g(tot) v gs = 10v, i d 5.6a, v ds = 0.8 x rated bv dss , r l = 14 ? , i g(ref) = 1.5ma (figure 14) gate charge is essentially independent of operat- ing temperature - 5.2 7.7 nc gate to source charge q gs - 1.5 - nc gate to drain ?iller?charge q gd - 2.2 - nc input capacitance c iss v gs = 0v, v ds = 25v, f = 1.0mhz (figure 11) - 180 - pf output capacitance c oss -82-pf reverse transfer capacitance c rss -15-pf internal drain inductance l d measured from the drain lead, 6mm (0.25in) from package to center of die modified mosfet symbol showing the internal devices inductances - 4.5 - nh internal source inductance l s measured from the source lead, 6mm (0.25in) from header to source bonding pad - 7.5 - nh junction to case r jc - - 5.0 o c/w junction to ambient r ja free air operation - - 110 o c/w l s l d g d s IRFR110, irfu110
?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b source to drain diode speci?ations parameter symbol test conditions min typ max units continuous source to drain current i sd modified mosfet symbol showing the integral reverse p-n junction diode - - 4.7 a pulse source to drain current (note 2) i sdm - - 17 a source to drain diode voltage (note 4) v sd t j = 25 o c, i sd = 4.7a, v gs = 0v (figure 13) - - 2.5 v reverse recovery time t rr t j = 25 o c, i sd = 5.6a, di sd /dt = 100a/ s 46 96 200 ns reverse recovery charge q rr t j = 25 o c, i sd = 5.6a, di sd /dt = 100a/ s 0.17 0.38 0.83 c notes: 2. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). 3. v dd = 25v, starting t j = 25 o c, l = 1.3mh, r g = 25 ? , peak i as = 4.7a. 4. pulse test: pulse width 300 s, duty cycle 2%. g d s typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. maximum transient thermal impedance t c , case temperature ( o c) 25 50 75 100 125 150 175 0 power dissipation multiplier 0 0 0.2 0.4 0.6 0.8 1.0 1.2 0 25 50 75 100 125 175 t c , case temperature ( o c) i d , drain current (a) 150 1 2 3 4 5 t 1 , rectangular pulse duration (s) 10 -5 10 -3 10 -2 10 -1 1 0.01 10 0.1 1 10 -4 10 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc + t c p dm t 1 t 2 single pulse z jc , transient thermal impedance 0.5 0.2 0.1 0.05 0.01 0.02 IRFR110, irfu110
?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b figure 4. forward bias safe operating area figure 5. output characteristics figure 6. saturation characteristics figure 7. transfer characteristics figure 8. drain to source on resistance vs gate voltage and drain current figure 9. normalized drain to source on resistance vs junction temperature typical performance curves unless otherwise speci?d (continued) 10 s 100 s 1ms 10ms dc v ds , drain to source voltage (v) i d , drain current (a) 10 2 10 1.0 0.1 110 10 2 t c = 25 o c operation in this area limited by r ds(on) 10 3 t j = max rated single pulse v gs = 10v v gs = 8v v gs = 7v v gs = 6v v gs = 5v v gs = 4v pulse duration = 80 s v ds , drain to source voltage (v) i d , drain current (a) 10 8 6 4 2 0 01020304050 duty cycle = 0.5% max v ds , drain to source voltage (v) i d , drain current (a) 10 8 6 4 2 0 0246810 v gs 10v v gs 8v v gs 7v v gs = 6v v gs 5v v gs 4v pulse duration = 80 s duty cycle = 0.5% max t j = 175 o c t j = 25 o c v gs , gate to source voltage (v) i d , drain current (a) 10 1 0.1 10 -2 0246810 pulse duration = 80 s duty cycle = 0.5% max v ds 50v v gs = 10v 5 4 3 2 1 0 04 8121620 i d , drain current (a) r ds(on) , drain to source v gs = 20v pulse duration = 80 s on resistance ( ? ) duty cycle = 0.5% max i d = 3.3a -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature ( o c) 3.0 2.4 1.8 1.2 0.5 0 normalized drain to source on resistance pulse duration = 80 s duty cycle = 0.5% max v gs = 10v IRFR110, irfu110
?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b figure 10. drain to source breakdown voltage vs junction temperature figure 11. capacitance vs drain to source voltage figure 12. transconductance vs drain current figure 13. source to drain diode voltage figure 14. gate to source voltage vs gate charge typical performance curves unless otherwise speci?d (continued) i d = 250 a -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature ( o c) 1.25 1.15 1.05 0.95 0.85 0.75 normalized drain to source breakdown voltage c rss c oss c iss v gs = 0v, f = 1mhz c iss = cgs + cgd c rss = cgd c oss cds + cgs 500 400 300 200 100 0 110 10 2 v ds , drain to source voltage (v) c, capacitance (pf) 2.5 2.0 1.5 1.0 0.5 0 0 246810 i d , drain current (a) g fs , transconductance (s) t j = 25 o c t j = 175 o c pulse duration = 80 s duty cycle = 0.5% max v ds 50v t j = 175 o c t j = 25 o c 1.0 0.1 0 0.4 0.8 1.2 1.6 2.0 v sd , source to drain voltage (v) i sd , source to drain current (a) 10 10 2 pulse duration = 80 s duty cycle = 0.5% max v ds = 80v v ds = 50v v ds = 20v i d = 5.6a 20 16 12 8 4 0 0246810 q g , gate charge (nc) v gs , gate to source voltage (v) IRFR110, irfu110
?002 fairchild semiconductor corporation IRFR110, irfu110 rev. b test circuits and waveforms figure 15. unclamped energy test circuit figure 16. unclamped energy waveforms figure 17. switching time test circuit figure 18. resistive switching waveforms figure 19. gate charge test circuit figure 20. gate charge waveforms t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs r l r g dut + - v dd t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 0.3 f 12v battery 50k ? v ds s dut d g i g(ref) 0 (isolated v ds 0.2 f current regulator i d current sampling i g current sampling supply) resistor resistor same type as dut q g(tot) q gd q gs v ds 0 v gs v dd i g(ref) 0 IRFR110, irfu110
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?


▲Up To Search▲   

 
Price & Availability of IRFR110

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X